SN74AUP1T86DCKR Integrated Circuit IC
Chip Exclusive OR Gate Low Power 3.3V CMOS Output Package SC-70-5
SN74AUP1T86DCKR
| Logic Type | | |
| Number of Circuits | | |
| Number of Inputs | | |
| Features | | |
| Voltage - Supply | | |
| Current - Quiescent (Max) | | |
| Current - Output High, Low | | |
| Input Logic Level - Low | | |
| Input Logic Level - High | | |
| Max Propagation Delay @ V, Max CL | | |
| Operating Temperature | | |
| Mounting Type | | |
| Supplier Device Package | | |
| Package / Case | 5-TSSOP, SC-70-5, SOT-353 | |
| Base Product Number | |
SN74AUP1T86DCKR DESCRIPTION
The SN74AUP1T86DCKR performs the Boolean function with designation for logic-level translation applications with output referenced to supply VCC. AUP technology is the industry's lowest-power logic technology designed for use in extending battery-life in operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply. This product also maintains excellent signal integrity (see Figure 1 and Figure 2). The wide VCC range of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external controllers or processors.
Schmitt-trigger inputs (ΔVT = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition. Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions. The SN74AUP1T86 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.
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